When a charged conductive object, e.g., a human body, contacts with or is sufficiently near another conductive object, e.g., an electronic device, intense discharging is generated. This phenomenon is called electrostatic discharge (hereinafter optionally referred to as “ESD”), and can cause problems such as the malfunctioning of or damage to the electronic devices, or can trigger an explosion in an explosive atmosphere.
ESD is a destructive and inevitable phenomenon to which electric systems and integrated circuits are exposed. From an electric viewpoint, ESD is a transient high electric current phenomenon such that a peak current of several amperes continues for 10 n sec and 300 n sec. Unless the occurrence of ESD is followed by the conduction of the electric current of several amperes to the outside of the integrated circuit within several ten nano sec, the integrated circuit suffers from unrepairable damage, or cause failure or deterioration, failing to work normally.
Recent rapid tendency of electronic parts and electronic devices toward their smaller weight, smaller thickness, and smaller size has brought about remarkable increase in the integration degree of semiconductors and the packaging density of electronic parts in printed wiring boards, so that electronic elements and signal lines, which are densely integrated or mounted, are very closely present among each other. Further, the rate of signal processing has been accelerated. Consequently, high-frequency radiation noise is easily induced. Under these circumstances, the development has been underway of an electrostatic discharge protection element for protecting IC and the like in circuits from ESD.
A conventional example of an electrostatic protection element for protecting IC and the like in circuits from ESD is an element having a bulk structure which element comprises a sintered substance composed of a metal oxide or the like (for example, Patent document 1). This element is a laminated chip varistor composed of a sintered substance and is equipped with a laminate and a pair of external electrodes. The varistor has excellent inhibitive power against electrostatic discharge, causing, upon an applied voltage reaching a certain value or more, a current that has not flown until then to flow quickly. However, the laminated chip varistor which is a sintered substance cannot be produced without relying on a complicated process comprising sheet molding, internal electrode printing, and sheet lamination, and moreover has failures such as easy occurrence of interlayer delamination during a mounting step.
A further example of the electrostatic protection element for protecting IC and the like in circuits from ESD is a discharge type element. The discharge type element is advantageous because of having a small leaked current, being simple in principle and being unlikely to have breakdown. Moreover, a discharge voltage can be controlled from the distance of a discharge gap. When the discharge type element has a sealing structure, the distance of the discharge gap can be determined according to the pressure of a gas and the type of a gas. Commercially available discharge type elements include those obtainable by glass tube sealing a discharge gap which is provided using laser or the like on a conductor film formed on a cylindrical ceramic surface. These commercially available glass tube sealed discharge gap elements have excellent electrostatic discharge properties, but the complicated form thereof has size limitation preventing the provision of a small sized surface mounting element and makes the cost reduction difficult.
Moreover, forming the discharge gap directly on a wiring and then adjusting the distance of the discharge gap to control a discharge voltage has been disclosed (for example, Patent documents 2 to 4). For example, Patent document 2 discloses the distance of the discharge gap as being 4 mm, and Patent document 3 discloses the distance of the discharge gap as being 0.15 mm. Patent document 4 discloses the discharge gap as being preferably 5 to 60 μm in order to protect general electronic elements, and discloses the discharge gap as being preferably 1 to 30 μm in order to protect IC or LSI sensitive to static electricity, and the discharge gap is disclosed therein as being able to be increased to about 150 μm in an application requiring the removal of a large pulse voltage part alone.
Still, without any protection of the discharge gap part, the application at a high voltage may cause aerial discharge and contamination of conductor surface due to moisture and gases in environment, possibly changing the discharge voltage and causing short circuit of the electrodes due to the carbonization of a base material on which electrodes are provided.
On the other hand, the electrostatic discharge protector having a discharge gap needs to have high insulating resistance at a normal operating voltage, e.g., at a voltage of, usually, less than DC10V. For this need, the provision of a voltage-resistant insulating member in the discharge gap of a pair of electrodes is effective. In order to protect the discharge gap, filling the discharge gap directly with a resist as such an insulating member is not practical, significantly increasing a discharge voltage; and filling a narrow discharge gap having a very narrow width of about 1 to 2 μm or less with a usual resist, although being capable of decreasing the discharge voltage, cause problems such as minute deterioration of the filled resist and the decrease in insulating resistance, which possibly causes conduction.
Patent document 5 discloses a protective element containing a discharge gap having a width of 10 to 50 μm provided on an insulating base material and a functional film containing ZnO as a main component and silicon carbide provided between a pair of electrode patterns which ends face each other. As compared with the laminated chip varistor, such a protective element advantageously has a simple structure and is capable of being produced as a thick film element on the base material.
While these elements taking measures against ESD have aimed for the decrease in a mounting area according to the development of electronic devices, their forms are still elements, which need to be mounted on a wiring base material using solder or the like. This reduces the freedom degree of designing in electronic devices and prevents further reduction of sizes such as a height.
In view of this, instead of fixing the elements, taking measures against ESD in necessary places and necessary areas with a free form including size reduction has been desired.
Meanwhile, the use of a resin composition as a protective material from ESD has been disclosed (for example, Patent document 6). This resin composition comprises a main component composed of an insulating binder mixture, conductive particles having an average particle diameter of less than 10 μm and semiconductor particles having an average particle diameter of less than 10 μm.
A further disclosed example of the protective material from ESD is a composition material containing a mixture of conductive particles and semiconductor particles which are surface-coated with an insulating oxide film, the particles being bonded with an insulating binder; a composition material having a defined particle diameter range; and a composition material having a defined surface distance between conductive particles (for example, Patent document 7).
A process described in Patent document 7, however, does not optimize a method of dispersing the conductive particles and semiconductor particles, and thus has a technically unstable factor such as a failure to obtain a high electric resistance value at low voltage or a failure to obtain a low electric resistance value at high voltage.
These compositions have high operating voltage at electrostatic discharge, and thus are unsuitable particularly for protecting low-resistant elements. They have a problem that semiconductor particles and insulating particles, particularly if blended in large amount, decreases the operating property, and that the metal particles, if blended alone, decreases high voltage resistance.